Reshoring and Restoring: CHIPS Implementation for a Competitive Semiconductor Industry

February 6, 2024 Industrial Policy

Executive Summary

Passed in August 2022, the bipartisan Creating Helpful Incentives to Produce Semiconductors Act (“CHIPS Act”) appropriated over $50 billion to support the domestic American semiconductor industry. It’s passage is a critical step to rebuild our national security and economic resilience.

The CHIPS Program Office (CPO), a new Department of Commerce team charged with implementing the Act’s industrial policy, is doing the right things to reshore semiconductor fabrication (“fab”) capacity and rebuild supply chain resilience. Already, there is substantial investment in building domestic fabs to produce high-end semiconductors, and policymakers have undertaken key steps to ensure some level of domestic production by using public investment.

Monopoly of Leading-Edge Logic Chips

However, the CHIPS Act faces two simultaneous problems of two different but related natures. First, at the leading edge of the industry, the direct fabrication of the most advanced logic chips has become monopolized by a single firm, Taiwan Semiconductor Manufacturing Company (TSMC), the bulk of whose operations are concentrated in geopolitically contested regions. This follows from decades of policy, in response to which American logic chip companies have turned to a “fabless” model of outsourcing all direct fabrication in response to financial pressures to avoid large capital expenditures. In this segment, the market power of TSMC and of American fabless chip companies could undermine the CHIPS Act’s effectiveness.

The U.S. semiconductor industry used to be competitive and vibrant, but today it is too concentrated and is plagued by many of the dangers one would expect from a consolidated sector, notably shortages, weak innovation, high prices, and the pooling of risk by a monopolist. According to TrendForce’s third-quarter 2023 financial analysis of foundry revenues, TSMC had 58% market share, nearly five times more than second-place Samsung at 12% share. Only two American firms were in the top 10: GlobalFoundries at third place with 6% share and Intel’s new Foundry Services business at ninth place with 1% share. Based on these share estimates, the global foundry industry’s Herfindahl–Hirschman Index, a commonly accepted measure of concentration, is 3,621, which is considered highly concentrated.[1] While TSMC controls 58% of foundry revenue share, its profit pool share likely exceeds 80%.

Two decades of patent abuse, exclusive deals, cheap money, and weak antitrust enforcement have gutted what used to be a crown jewel of the American economy. While there is a need for significant capital investment to sustain the semiconductor business, this consolidation is the result of business practices, not economies of scale.

Since 2010, intra-sector acquisitions have shrunk the number of independent U.S. semiconductor firms by over 40%. Concentration and profits rose while innovation and resilience fell. The result is a handful of firms that exercise market power over the modern economy’s most critical input.

This monopoly problem is not natural, but is rather the result of policy. For comparison’s sake, high-end memory chips require similar levels of manufacturing complexity and capital investments as logic chips; however, the memory market is intensely competitive. Micron, a U.S.-based, vertically integrated producer, has domestic fabs making the highest-end products. And in response to the CHIPS Act, Micron has committed to significant domestic investment, because if it did not, its competitors would seize market share.

Mature-Node Resilience

The second problem — separate from leading-edge logic chip monopolization — is in the less-advanced portions of the industry, where shortages of low-cost, high-volume mature-node and lagging-edge chips led to a range of price increases and manufacturing shutdowns in the wake of the pandemic. Whereas monopoly and massive profits characterize the industry’s leading edge, lagging-edge chips are often commoditized such that thin margins, price wars, and overcapacity destabilize the market. In response to these competitive pressures, chip makers sought low-cost locations to build their fabs, with China at the top of the list. In turn, China seeks to control this category as a first step toward total semiconductor industry dominance. This category of chips is under the greatest threat of foreign subsidies and dumping, particularly from state-supported Chinese chip makers. This presents a real challenge for the CHIPS Act to maintain a domestic manufacturing base given the high costs and low margins that any private-sector American producer could expect. It is a demand problem driven by the component sourcing strategies of the largest original equipment manufacturers (OEMs) like Apple, HP, Dell, Samsung, Google, and others. If buyers of these mature-node chips continue their globalized sourcing to chase the lowest-cost producer, then U.S. fabs supported with CHIPS funds will struggle.

The lesson from these different parts of the semiconductor industry — leading-edge logic, memory, and mature node/lagging edge — is that anti-monopoly policy and trade policy are both industrial policy. The goal of the CHIPS Act is to make sure that there is a robust base of fabs that give buyers multiple sources to supply chips. This report describes some of the key elements involved in constructing an anti-monopoly policy for the semiconductor industry, to ensure that the CHIPS Act is successful in fostering resilience in this critical sector. It explains how the semiconductor industry works, why the semiconductor industry got into trouble, and some of the key policy problems to address. We also offer solutions to restore the vitality of the industry.

Policy Guides Market Structure

The CHIPS Act addresses the symptoms of both problems — leading-edge monopolies and mature-node resilience — but not the root causes. Over the last five years, nine of the 10 largest U.S. semiconductor firms spent $239 billion in earnings on investor payouts[2] rather than building fabs, investing in R&D, and hiring workers (see graph below). When including Apple, the world’s largest buyer of chips, this capital misallocation leaps to a staggering $698 billion — an amount 14 times the total CHIPS Act funding, or enough to build 70 leading-edge fabs.

Defense-industry leader BAE runs a secure fab in New Hampshire that makes chips for fighter planes and other national security purposes. In December 2023, BAE was the first chip maker to receive a grant under the CHIPS Act — $35 million — to upgrade and expand capacity of this critical fab.[3] However, BAE not only spent $3.3 billion on investor payouts between 2021 and 2022 but its board approved another $1.9 billion share buyback in mid-2023.

If economies of scale were driving the needs of this industry, semiconductor firms would be building fabs to compete — as they used to do and as certain parts of the industry still do — instead of paying out shareholders.

Industrial policy in semiconductors is not new; indeed all semiconductor firm behavior is responsive to government rule-writing. Consider recent examples, both positive and negative:

  • In 2015, antitrust enforcers allowed Intel to buy FPGA[4] leader Altera, providing the biggest logic chip company with a dominant position in the adjacent FPGA market.
  • In 2017, the FTC sued Qualcomm over patents. The Pentagon, the Department of Energy, and the Antitrust Division opposed the FTC, and the Ninth Circuit ruled for Qualcomm.
  • Antitrust enforcers allowed Microchip to build an anticompetitive moat by acquiring low-cost competitors Micrel (2015), Atmel (2016), and Microsemi (2018).
  • In 2011, antitrust enforcers allowed Texas Instruments to acquire National Semiconductor.
  • Policymakers allowed Apple to monopolize smartphones and TSMC to exclude rivals in high-end fabs.
  • Policymakers blocked the mergers of Nvidia-ARM, Broadcom-Qualcomm, and Tsinghua Unigroup-Micron.
  • Policymakers granted permanent normal trade relations status to China in 2001 as part of its entry into the World Trade Organization, which allowed the offshoring of swaths of industrial production to that country, including the fabrication of mature-node chips.

In other words, the consolidated nature of the market, as well as the sectors where there is more competition, is a function of policy choices. Fortunately, there is ample policy space to address the private deployment of capital in this sector. The CHIPS Act provides the Secretary of Commerce broad discretion to “establish such rules, regulations and procedures that [she] considers appropriate.”[5] This policy latitude should be applied to meet Congress’ intent that “the Secretary [of Commerce] should allocate [CHIPS] funds in a manner that … strengthens the leadership of the United States in the semiconductor industry.”[6]

We recommend a set of measured, targeted policies to restore semiconductor competition and innovation, ensuring American leadership for another generation:

  • Incubate entrants with a goal of four independent, leading-edge logic foundries:
    The CPO must fund fabs with the intent to increase competition and resilience. Research shows that four market participants is ideal to restore the benefits of competition. TSMC’s dominance in the foundry market creates too brittle of a supply chain and opens the door for monopsonists, or buying monopolies, to manipulate tight fab capacity to exclude other fabless chip makers and new competitive entrants.
  • Include Federal Trade Commission review and consultation in CHIPS program:
    Given the role of anticompetitive behavior in creating today’s concentrated market, the CPO should work in consultation with antitrust enforcers at the FTC to allocate CHIPS funding and setting criteria for funding recipients.
  • Develop thicker markets:
    New fabs need long-term demand contracts from U.S. government and private-sector buyers, foundries should operate under quasi-common carrier principles, and the industry should work toward standardized designs to lower switching costs.
  • Pass legislation to require dual-sourcing:
    To prevent another single foundry gaining market dominance, fabless firms should be required to dual-source their manufacturing among at least two foundries. This will help to “thicken” the market and balance supply.
  • Address long-term incentives that underlie the fabless business model:
    As noted above, a number of predatory practices have enabled the fabless model. The CPO and NIST must require more open patent and IP licensing, while disincentivizing extractive business practices like dividends and buybacks, which divert retained earnings away from workers, fabs, and R&D.
  • Shore up domestic resilience for mature-node semiconductor production:
    The CPO should work closely with the International Trade Administration (ITA) to monitor markets and promote the adoption of antidumping and countervailing duties (AD/CVD) against foreign dumping or subsidies for commoditized mature-node chips. The reality, however, is that AD/CVD tools will have limited effectiveness because final product assembly tends to happen in East and Southeast Asia, close to Chinese chip makers.
  • Increase most-favored nation (MFN) rates on end-use chip products:
    Tariffs can play a role to diversify final assembly. An increase in MFN rates on final electronic products like smartphones and computers will encourage some shift of electronics assembly away from Asia, giving domestic chip makers an incremental advantage.
  • Pass legislation to create an American Semiconductor Supply Chain Resiliency Fee:
    Protect mature-node chip manufacturers from predatory supply chain practices by assessing a fee on select consumer electronics that are not built with available American semiconductors. This new law would require original equipment manufacturers (Apple, Samsung, Dell, HP, Lenovo, Amazon, Google, Sony, LG, etc.) to source 30% of their products’ aggregate semiconductors from U.S.-based fabs or pay a $10-$20 per device fee on all products sold in the U.S. with a retail price of $300 or higher. This new fee — the American Semiconductor Supply Chain Resiliency (ASSCR) Fee — would be managed by the CPO with the intent to protect domestic semiconductor makers from both unfair foreign competition and unethical OEM supply chain practices. Alternatively, many of the same objectives could be accomplished through a tax subsidy for chip buyers (OEMs) that source their chips from domestic fabs, following the policy and funding structure of the Inflation Reduction Act.
  • Pass legislation to establish demand-side subsidies for consumer electronics made with domestic chips:
    As an alternative to the ASSCR, Congress could establish chip content subsidies on products sourced with a significant share of domestically made semiconductors. This demand-side subsidy structure is analogous to the Inflation Reduction Act’s electric vehicle and heat pump subsidies. Electronics OEMs in price-sensitive consumer categories would risk margin and market share losses by sourcing non-U.S. chips.

Last, Apple’s role must be addressed. It is the world’s largest buyer of semiconductors and among the largest fabless chip makers. Apple dominates both ends of the semiconductor value chain, maintains tight control over product distribution, and chases away category competitors. Apple can either catalyze the CHIPS Act or continue to free ride on the U.S. taxpayer.

* The authors would like to thank Bharat Ramamurti, Nidhi Hegde, Faiz Shakir, Matt Stoller, and Lori Wallach for feedback, support, and comments in the preparation of this report.

[1] TrendForce, “Latest Financial Reports of the Global Seven Foundries,” November 22, 2023, Author estimates.

[2] “Investor payouts” refers to the combination of dividends and share buybacks. Data gathered from financial filings.

[3] Department of Commerce, “Biden-Harris Administration and BAE Systems, Inc., Announce CHIPS Preliminary Terms to Support Critical U.S. National Security Project in Nashua, New Hampshire,” December 11, 2023,

[4] See Key Terms section for a definition of FPGA.

[5] 15 U.S. Code § 4659(a)7,

[6] 15 U.S. Code § 4652(d),